Variation Issues in On-Chip Optical Clock Distribution

On-chip optical clock distribution is being investigated as a fbture means to increase clock speed and reduce clock power. While extremely small skew in the arrival of an on-chip optical signal can be achieved, the conversion of the optical signal to a local electrical clock may be subject to substantial variation. A baseline receiver circuit has been designed and fabricated. We find that sensitivity to device and operating condition variation reintroduces substantial clock skew. Future optical on-chip clock design approaches must take such variation sources into account. INTRODUCTION ON-CHIP OPTICAL CLOCK DISTRIBUTION To achieve future desired clock speeds well beyond 2GHz in high performance integrated circuits, altemative technologies for on-chip signal and clock distribution are being explored. One option is optical distribution of a global clock signal, with conversion to a local electrical signal as pictured in Fig. 1. In this scenario, an off-chip optical source is brought to the chip, distributed through waveguides, and converted through receiver circuitry to a local electrical clock distribution network. The potential advantages of such optical clock distribution include a very low skew distribution of the optical signals, enabling high clock speeds. In addition, such clocks may be more noise immune and generate less on-chip noise, and power reductions may also be possible [ 11.